Model Predictive Control (MPC) is a very appropriate control scheme for many real word applications as it can handle systems that must satisfy constraints in either or both input and output signals. To achieve this, model predictive controllers have to solve a nonlinear (usually quadratic) optimization problem with constraints at each sampling interval by means of a suitable optimization algorithm. In consequence MPC is a very computationally demanding control scheme that has traditionally been used for slow dynamics plant control systems with sampling times of many seconds or even minutes. Although over the last years the computational capacity of general purpose processors has been improved dramatically, implementing MPCs with sampling periods in the range of milliseconds and below still remains a challenging engineering problem for many control systems. The vertiginous development of reconfigurable hardware technology, mainly FPGAs , and today’s availability of advanced software tools for designing and synthesizing complex digital processing systems on a single reconfigurable chip, opens a window of opportunity for the implementation of very fast response model predictive controllers. FPGA technology allows for tailoring the controller architecture to a specific control problem and to reconfiguring it when control requirements or system parameters change. Word-lengths of signals can be adjusted independently to obtain desired control responses while minimising system complexity, occupied silicon area, and power consumption. Besides, parallelism can be exploited to produce fast response systems even when complex algorithms are involved in the computation of control signals. On the other hand, system level hardware design tools and cycle-accurate bit-true hardware simulators provide a powerful framework to analyse the behaviour of feedback control systems based on digital controllers that operate with finite precision signals. The aim of this project is to build high speed model predictive controllers embedded in FPGAs. To do so, accelerated hardware implementations of quadratic programming solver must be developed. This implies studying the numerical effects of limited precision signal computation in matrix operations and its influence on the convergence of quadratic programming optimisation algorithms. Aspects related to control robustness and accuracy when using digital controllers in feedback systems must also be considered.
Supervisors: Dr. Khaled Benkrid and Dr. Koldo Bbasterretxea (University of the Basque Country, Homepage)
