Run time dynamic reconfiguration is a promising but largely untapped technology which provides systems developers with low power/area, low cost and adaptive alternative solutions. However, large scale uptake of this technology has been somewhat timid due to limited hardware support but also, perhaps mainly, due to limited software support. Indeed, the software development environments provided by FPGA vendors for run time dynamic reconfiguration is fairly basic and many tedious tasks are often left to the application developers to figure out (e.g. extraction of run time dynamic reconfiguration opportunities from algorithmic descriptions, extraction of run-time reconfiguration data, and reconfiguration scheduling).
The aim of this project is to assist application developers with high level tools for run time dynamic reconfiguration using both module-based and difference-based methods. The main application area that we will target is real time image and video processing and digital signal processing applications in general. The proposed tools would allow users to extract dynamic reconfiguration opportunities automatically from a high level abstract description of the algorithm in hand. These would also automatically instantiate the necessary interface and control hardware/software to schedule the run time reconfiguration of different parts/modules of the chip configuration.
Supervisors: Dr. Khaled Benkrid and Professor Tughrul Arslan
Collaborators: IKERLAN, Basque Country, Spain
