High Performance Financial Computing using Reconfigurable System-on-Chip Technology

The aim of this project is to explore novel methods and tools for high performance financial computing using state-of-the-art programmable system-on-chip technology. In particular, the project will look at Monte Carlo simulation techniques of financial models, which are of paramount importance in financial applications such as bond pricing, risk analysis and market prediction. Our aim is to harness the high performance and flexibility of reconfigurable hardware platforms, or FPGAs, and assist financial experts with powerful computing resources which allow for real time financial computing. This includes the design of the necessary FPGA hardware but also of the corresponding Application Programming Interface (API) which allows financial experts, with little or no hardware knowledge, to program FPGAs seamlessly. The technical contributions of this project will include:

  • The design of highly parameterised hardware architectures for financial computation using the concept of hardware skeletons
  • Exploring the merits of both floating and fixed point arithmetic in such applications
  • Exploring evolving hardware techniques such as run-time optimisation and reconfiguration to adapt to various environmental conditions e.g. performance, power etc.
  • Development of a prototype working environment running on FPGA hardware e.g. the Maxwell FPGA supercomputer at the University of Edinburgh.

While this project deals with financial applications, its results will certainly be harnessed in other application areas and drive the development of architectures and tools for novel computations techniques.

Selected Publications

Supervisor: Dr. Khaled Benkrid

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